Congratulations to IPexpert’s Latest CCIE Success Stories!!!
Congratulations to:
• Rob Simmons #26625 (R&S)
• Dominic Zeni #26686 (R&S)
Congratulations to IPexpert’s Latest CCIE Success Stories!!!
Congratulations to:
• Rob Simmons #26625 (R&S)
• Dominic Zeni #26686 (R&S)
When we are dealing with IPv6 “private” addressing, it can quickly become pretty confusing. The reason this particular topic becomes confusing is because the people that have developed the technology keep changing their minds!!! Let’s go through some history.
Welcome back everybody to another edition of IPexpert’s techtorial series! Today we will be looking at a topic that seems to be scaring some folks out there with regards to the R&S v4.0 blueprint – OSPF Sham Links. Now – Up until v4.0 this was pretty much always considered strictly a CCIE SP related topic. But, that was then and this is now. I’m not saying to definitely expect it, but I am saying it is likely “fair game” for the new exam, and it would probably nice if you at least get the general concept down. Let’s take a look at our base topology than shall we?
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Chances are that if you have been working with Cisco technologies for a while in your career or through study that you have come across a variety of different ways to authenticate the point-to-point protocol over serial links. For instance, most of you are probably aware of PAP and CHAP to handle this. If you have been doing CCIE study, you might even be aware of EAP. PAP uses plain-text authentication while CHAP and EAP use MD5 based authentication. This is all well and good, but these methods only authenticate the link — they do not actually encrypt the data going between the two end points. In order to do encryption, there is a lesser well known protocol known as MPPE (Microsoft Point-To-Point Encryption).
In today’s blog we are going to take a look at QoS on the Catalyst 3560 platform – the only switch we need to be concerned with in the CCIE R&S lab. QoS on the 3560 is quite an elaborate topic. This article is not designed to teach you every possible command and option there is to know, but is designed rather to take a look at the most important aspects that are important to understand from the perspective of a CCIE R&S candidate. The ultimate resource for Catalyst 3560 QoS information is of course the 3560 software configuration guide. We will first look at the general QoS model, and then take some time to break apart each section. I won’t lie to you guys — 3560 QoS is an intense topic for most people. This blog will be lengthy, but I will try to keep it to the most important things. 10 or 11 pages is certainly probably more attractive than picking it out of the 1300 page configuration guide yourself : ) Hopefully after reading this blog you will have a much clearer understanding of your options when dealing with 3560 QoS.
